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TSS461C 데이터시트(PDF) 13 Page - ATMEL Corporation

부품명 TSS461C
상세설명  VAN Data Link Controller
PDF  57 Pages
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제조업체  ATMEL [ATMEL Corporation]
홈페이지  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

TSS461C 데이터시트(HTML) 13 Page - ATMEL Corporation

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TSS461C
4193G–AUTO–12/04
Figure 6 shows a normal VAN bus frame. It is initiated with a Start of Frame (SOF)
sequence shown in Figure 8. The SOF can only be transmitted by an autonomous mod-
ule. During the preamble, the TSS461C will synchronize its bit rate clock to the data
received.
Figure 8. Framing Sequences
When the complete SOF sequence has been transmitted or received, the circuit will
start the transmission or reception of the identifier field.
All data on the VAN bus, including the identifier and Frame Check Sum (FCS), are
transmitted using enhanced Manchester code.
In enhanced Manchester code, three NRZ bits are transmitted first followed by one
Manchester bit, then three more NRZ bits followed by one Manchester bit and so on.
Since the high state is recessive and the low state is dominant, the bus arbitration can
be done. If a module wants access to the bus, it must first listen to the bus during one
full End of Frame (EOF) and one full Inter Frame Spacing (IFS) period, to determine
whether the bus is free or not (i.e., no dominant states received).
Figure 9. Data Encoding
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
NUMBER OF
PRESCALED
CLOCKS
PREAMBLE
START OF FRAME
START
SYNC
END OF
DATA
ACK
END OF FRAME
0
16
32
48
64
80
96
112 128 144
160 176 192
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
VAN BUS
SEQUENCE
NUMBER OF
PRESCALED
CLOCKS
NRZ 0
NRZ 1
MANCHESTER 0
MANCHESTER 1
0
8
16
24
32



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