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IMX7DCEC 데이터시트(PDF) 108 Page - NXP Semiconductors |
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IMX7DCEC 데이터시트(HTML) 108 Page - NXP Semiconductors |
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108 / 161 page ![]() Electrical characteristics i.MX 7Dual Family of Applications Processors Datasheet, Rev. 7, 09/2023 NXP Semiconductors 108 4.10.11.2 DDR Mode Figure 74. QuadSPI Input/Read Timing (DDR mode with internal sampling) Figure 75. QuadSPI Input/Read Timing (DDR mode with loopback DQS sampling) NOTE • For internal sampling, the timing values assumes using sample point 0, that is QuadSPIx_SMPR[SDRSMP] = 0. Table 82. QuadSPI Input/Read Timing (DDR mode with internal sampling) Symbol Parameter Value Unit Min Max TIS Setup time for incoming data 8.67 — ns TIH Hold time requirement for incoming data 0 — ns Table 83. QuadSPI Input/Read Timing (DDR mode with loopback DQS sampling) Symbol Parameter Value Unit Min Max TIS Setup time for incoming data 2 — ns TIH Hold time requirement for incoming data 1 — ns TIS TIH TIS TIH QSPIx_SCLK QSPIx_DATA[0:3] 1234 TIS TIH TIS TIH QSPIx_SCLK QSPIx_DATA[0:3] QSPIx_DQS |
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