PCF2131 datasheet(16/85 Pages) NXP

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NXP Semiconductors

PCF2131

Nano-power highly accurate RTC with integrated quartz crystal

[1]

Duty cycle definition: % HIGH-level time: % LOW-level time.

[2]

Default value.

The duty cycle of the selected clock is not controlled, however, due to the nature of the clock generation all but

the 32.768 kHz frequencies are 50 : 50.

7.4 Register Aging_offset

Bits labeled as T are unused and return 0 when read.

Bit

Symbol

AO[3:0]

Reset

value

Table 19. Aging_offset - crystal aging offset register (address 30h) bit allocation

Bits labeled as T are unused and return 0 when read.

Bit

Symbol

Value

Description

7 to 4

0000

unused

3 to 0

AO[3:0]

see Table 21

aging offset value

Table 20. Aging_offset - crystal aging offset register (address 30h) bit description

7.4.1 Crystal aging correction

The PCF2131 has an offset register Aging_offset to correct the crystal aging effects 1 .

The accuracy of the frequency of a quartz crystal depends on its aging. The aging offset adds an adjustment,

positive or negative, in the temperature compensation circuit which allows correcting the aging effect.

The aging offset bits allow a frequency correction of typically 2 ppm per AO[3:0] value, from -14 ppm to +16

ppm.

AO[3:0]

Decimal

Binary

ppm

0000

+16

0001

+14

0010

+12

0011

+10

0100

0101

0110

0111

1000

[1] 0

1001

-2

Table 21. Frequency correction at 25 °C, typical

For further information, refer to the application note [1].

PCF2131

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.0 — 5 October 2023

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