PCF2131 datasheet(35/85 Pages) NXP

35 / 85 page

NXP Semiconductors

PCF2131

Nano-power highly accurate RTC with integrated quartz crystal

7.10.5 Register Weekday_alarm

Bits labeled as T are unused and return 0 when read.Bits labeled as X are undefined at power-on and unchanged by

subsequent resets.

Bit

Symbol

AE_W

WEEKDAY_ALARM (0 to 6)

Reset

value

Table 53. Weekday_alarm - weekday alarm register (address 12h) bit allocation

Bit positions labeled as - are not implemented and return 0 when read. Bits labeled as X are undefined at power-on and

unchanged by subsequent resets.

Bit

Symbol

Value

Description

weekday alarm is enabled

AE_W

weekday alarm is disabled

6 to 3

unused

2 to 0

WEEKDAY_ALARM

0 to 6

weekday alarm information

Table 54. Weekday_alarm - weekday alarm register (address 12h) bit description

7.10.6 Alarm flag

When all enabled comparisons first match, the alarm flag AF (register Control_2) is set. AF remains set until

cleared by command. Once AF has been cleared, it will only be set again when the time increments to match

the alarm condition once more. For clearing the flags, see Section 7.11.5

Alarm registers which have their alarm enable bit AE_x at logic 1 are ignored.

001aaf903

minute alarm

minutes counter

INT when AIE = 1

Example where only the minute alarm is used and no other interrupts are enabled.

Figure 15. Alarm flag timing diagram

7.11 Watchdog timer functions

The PCF2131 has a watchdog timer function. The timer can be switched on and off by using the control bit

WD_CD in the register Watchdg_tim_ctl.

The watchdog timer has four selectable source clocks. It can, for example, be used to detect a micro-controller

with interrupt and reset capability which is out of control (see Section 7.11.3)

To control the timer function and timer output, the registers Control_2, Watchdg_tim_ctl, and Watchdg_tim_val

are used.

PCF2131

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.0 — 5 October 2023

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