PCF2131 datasheet(53/85 Pages) NXP

53 / 85 page

NXP Semiconductors

PCF2131

Nano-power highly accurate RTC with integrated quartz crystal

aaa-041581

months data 11BCD

years data 06BCD

addr 0Ch

R/W

SCL

SDI

SDA/CE

address

counter

SDO

In this example, the registers Months and Years are read. The pins SDI and SDO are not connected together. For this

configuration, it is important that pin SDI is never left floating. It must always be driven either HIGH or LOW. If pin SDI is

left open, high IDD currents may result.

Figure 28. SPI-bus read example

7.16.2 I2C-bus interface

The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a

Serial DAta line (SDA) and a Serial CLock line (SCL). Both lines are connected to a positive supply by a pull-up

resistor. Data transfer is initiated only when the bus is not busy.

7.16.2.1 Bit transfer

One data bit is transferred during each clock pulse. The data on the SDA line remains stable during the

HIGH period of the clock pulse as changes in the data line at this time are interpreted as control signals (see

Figure 29).

mbc621

data line

stable;

data valid

change

of data

allowed

SDA

SCL

Figure 29. Bit transfer

7.16.2.2 START and STOP conditions

Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line,

while the clock is HIGH, is defined as the START condition S. A LOW-to-HIGH transition of the data line while

the clock is HIGH is defined as the STOP condition P (see Figure 30).

PCF2131

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2.0 — 5 October 2023

53 / 85

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