CLRC663 datasheet(77/177 Pages) NXP

77 / 177 page

NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

Bit

Symbol

Description

7 to 0

T1Counter

ValLo

Low byte of the current value of the counter 1.

This value shall not be read out during reception.

Table 100. T1CounterValLo bits

9.7.2.10 T2Control

Control register of the Timer2.

Bit

Symbol

T2StopRx

T2Start

T2AutoRestart

T2Clk

Access

rights

r/w

RFU

r/w

RFU

r/w

Table 101. T2Control register (address 19h)

Bit

Symbol

Description

T2StopRx

If set the timer stops immediately after receiving the first 4 bits. If cleared indicates, that

the timer is not stopped automatically.

Note: If LFO Trimming is selected by T2Start, this bit has no effect.

RFU

5 to 4

T2Start

00 b: The timer is not started automatically.

01 b: The timer starts automatically at the end of the transmission.

10 b: Timer is used for LFO trimming without underflow (Start/Stop on PosEdge).

11 b: Timer is used for LFO trimming with underflow (Start/Stop on PosEdge).

T2AutoRestart

Set to logic 1, the timer automatically restarts its countdown from T2ReloadValue, after

the counter value has reached the value zero. Set to logic 0 the timer decrements to

zero and stops. The bit Timer2IRQ is set to logic 1 when the timer underflows

RFU

1 to 0

T2Clk

00 b: The timer input clock is 13.56 MHz.

01 b: The timer input clock is 212 kHz.

10 b: The timer input clock is an underflow of Timer0

11b: The timer input clock is an underflow of Timer1

Table 102. T2Control bits

9.7.2.11 T2ReloadHi

High byte of the reload value of Timer2.

Bit

Symbol

T2ReloadHi

Access

rights

r/w

Table 103. T2ReloadHi register (address 1Ah)

CLRC663

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 5.3 — 3 January 2024

77 / 177

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