| 전자부품 데이터시트 검색엔진 |
|
TSL2521 데이터시트(PDF) 61 Page - OSRAM GmbH |
|
|
|||||||||||||||||||||||||||||
TSL2521 데이터시트(HTML) 61 Page - OSRAM GmbH |
|
61 / 81 page ![]() Page 60 Datasheet, Public Document Feedback [v3-00] 2022-Dec-21 TSL2521 − Register O ver view VSYNC_CONTROL Register Figure 77: VSYNC_CONTROL Note(s): 1. Return to the Register Map (0xF6). Addr: 0xF6 VSYNC_CONTROL Bit Field Reset Type Bit Description 7:2 Reserved 0 1 HOLD_VSYNC_PERIOD 0 R/W If set to “1” VSYNC_PERIOD[15:8] and VSYNC_ PERIOD[7:0] cannot be updated until VSYNC_ PERIOD[15:8] has been read. It will avoid that updates during I²C readings. 0SW_VSYNC_TRIGGER 0 R/W If VSYNC_MODE is set to “1”, this bit can be used to trigger a SW sync. In case the exact time is known between two consecutive I²C reading the offset of the oscillator frequency can be calculated from the result in VSYNC_TRIGGER |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |