NAND512R3A2C datasheet(24/51 Pages) STMICROELECTRONICS

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Device operations

NAND512-A2C

24/51

6.4

Copy Back Program

The Copy Back Program operation is used to copy the data stored in one page and

reprogram it in another page.

The Copy Back Program operation does not require external memory and so the operation

is faster and more efficient because the reading and loading cycles are not required. The

operation is particularly useful when a portion of a block is updated and the rest of the block

needs to be copied to the newly assigned block.

If the Copy Back Program operation fails an error is signalled in the Status Register.

However as the standard external ECC cannot be used with the Copy Back operation bit

error due to charge loss cannot be detected. For this reason it is recommended to limit the

number of Copy Back operations on the same data and or to improve the performance of the

ECC.

The Copy Back Program operation requires two steps:

The source page must be read using the Read A command (one bus write cycle to

setup the command and then 4 bus write cycles to input the source page address).

This operation copies all 264 Words/ 528 Bytes from the page into the Page Buffer.

When the device returns to the ready state (Ready/Busy High), the second bus write

cycle of the command is given with the 4 bus cycles to input the target page address.

Refer to Table 10 for the addresses that must be the same for the Source and Target

pages.

The Program Confirm command (code 10h) is no more necessary on NAND512-A2C

devices. It is optional and has been maintained for backward compatibility.

After a Copy Back Program operation, a partial-page program is not allowed in the target

page until the block has been erased.

See Figure 11 for an example of the Copy Back operation.

Figure 11.

Copy Back operation

The Program Confirm command (code 10h) is no more necessary on NAND512-A2C devices. It is optional and has been

maintained for backward compatibility.

Table 10.

Copy Back Program addresses

Density

Same Address for Source and Target Pages

512 Mbit

A25

I/O

Source

Address Inputs

SR0

ai13187

8Ah

70h

00h

Copy Back

Code

Read

Code

Read Status Register

Target

Address Inputs

tBLBH1

(Read Busy time)

10h(1)

Busy

tBLBH2

(Program Busy time)

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