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MCP6G01-E/MS 데이터시트(PDF) 7 Page - Microchip Technology |
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MCP6G01-E/MS 데이터시트(HTML) 7 Page - Microchip Technology |
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7 / 38 page ![]() © 2006 Microchip Technology Inc. DS22004B-page 7 MCP6G01/1R/1U/2/3/4 1.1 DC Output Voltage Specs / Model 1.1.1 IDEAL MODEL The ideal SGA output voltage (VOUT) is (see Figure 1-3): EQUATION 1-1: This equation holds when there are no gain or offset errors. 1.1.2 LINEAR MODEL The SGA’s linear region of operation is modeled by the line VO_LIN shown in Figure 1-3. VO_LIN includes offset and gain errors, but does not include non-linear effects. EQUATION 1-2: This line’s endpoints are 0.3V from the supply rails (VO_ID = 0.3V and VDD – 0.3V). The gain error and input offset voltage specifications (in the electrical specifications) relate to Figure 1-3 as follows: EQUATION 1-3: The input offset specification describes VOS at G=+1 V/V. The DC Gain Drift ( ΔG/ΔTA) can be calculated from the change in gE across temperature. This is shown in the following equation: EQUATION 1-4: FIGURE 1-3: Output Voltage Model. 1.1.3 OUTPUT NON-LINEARITY Figure 1-4 shows the Integral Non-Linearity (INL) of the output voltage. INL is the output non-linearity error not explained by VO_LIN: EQUATION 1-5: The output non-linearity specification (in the Electrical Specifications, with units of % of FSR) is related to Figure 1-4 by: EQUATION 1-6: Note that the Full Scale Range (FSR) is VDD –0.6V (0.3V to VDD –0.3V). Where: G is the nominal gain VO_ID GVIN = VREF VSS 0V == VO_LIN G 1 gE + () V IN 0.3V G ------------ VOS + – ⎝⎠ ⎛⎞ 0.3V + = VREF VSS 0V == Where: G is the nominal gain gE is the gain error VOS is the input offset voltage gE 100% V2 V1 – VDD 0.6V – ----------------------------- ⋅ = VOS V1 G 1 gE + () -------------------------, = G +1 = Where: V1 VOUT VO_ID, – = VO_ID 0.3V = V2 VOUT VO_ID, – = VO_ID VDD 0.3V – = G Δ TA Δ ⁄ G gE Δ TA Δ ----------, ⋅ = in units of V/V/°C G Δ TA Δ ⁄ 100% gE Δ TA Δ ----------, ⋅ = in units of %/°C 0 0 0.3 VDD-0.3 VDD V O UT VOUT (V) VIN (V) 0.3 VDD-0.3 VDD G GG V1 V O _ID V O _L IN V2 INL VOUT VO_LIN – = VONL 100% max V3 V4 , () VDD 0.6V – ------------------------------- ⋅ = V3 max INL – () = Where: V4 max INL () = |
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