MCP6G01-ESLASHMS datasheet(19/38 Pages) MICROCHIP

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DS22004B-page 19

MCP6G01/1R/1U/2/3/4

4.0

APPLICATIONS INFORMATION

The MCP6G01/1R/1U/2/3/4 family of Selectable Gain

Amplifiers (SGA) is based on simple analog building

blocks (see Figure 4-1). Each of these blocks will be

explained in more detail in the following subsections.

FIGURE 4-1:

SGA Block Diagram.

4.1

Internal Op Amp

The internal op amp gives the right combination of

bandwidth, accuracy, and flexibility.

4.1.1

COMPENSATION CAPACITORS

The internal op amp has three compensation

capacitors (comp. caps.) connected to a switching

network. They are selected to give good small signal

bandwidth at high gains, and good slew rate (full power

bandwidth) at low gains. The change in bandwidth as

gain changes is between 250 and 900 kHz. Refer to

Table 4-1 for more information.

TABLE 4-1:

GAIN VS. INTERNAL

COMPENSATION

CAPACITOR

4.1.2

RAIL-TO-RAIL INPUTS

The input stage of the internal op amp uses two

differential input stages in parallel; one operates at low

VIN (input voltage), while the other operates at high VIN.

With this topology, the internal inputs can operate to

0.3V past either supply rail, although the output will clip

the signal before that happens.

The inputs need to be kept within a smaller range to

prevent output clipping. The input offset voltage also

reduces the range; most designs will need the following

for normal operation:

EQUATION 4-1:

The transition between the two input stage occurs

when VIN ≈ VDD – 1.1V (see Figure 2-19 and Figure 2-

22). For the best distortion and gain linearity, avoid this

region of operation.

4.1.3

PHASE REVERSAL

The

MCP6G01/1R/1U/2/3/4

amplifier

family

designed with CMOS input devices. It is designed to

not exhibit phase inversion when the input pins exceed

the supply voltages. Figure 2-7 shows an input voltage

exceeding both supplies with no resulting phase

inversion.

Gain

(V/V)

GSEL Voltage (Typ.)

(V)

1VDD/2 (or open)

VDD

Note:

VSS is assumed to be 0V

VOUT

VDD

GSEL

VIN

VSS

Gain Select

Logic

Gain

Switches

(MCP6G03

only)

Gain

(V/V)

Internal

Comp.

Cap.

G x BW

(MHz)

Typ.

(V/µs)

Typ.

FPBW

(kHz)

Typ.

(kHz)

Typ.

Large

0.90

0.50

900

Medium

3.5

2.3

133

350

Small

12.5

4.5

260

250

Note 1:

Changing the compensation capacitor does not

change the DC performance (e.g., VOS).

G x BW is approximately the Gain Bandwidth

Product of the internal op amp.

FPBW is the Full Power Bandwidth at

VDD = 5.5V, which is based on slew rate (SR).

BW is the closed-loop, small signal –3 dB

bandwidth.

VOL

---------- VOS VIN

VOH

----------- VOS

–

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