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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PIC16F883-E/MLQTP 데이터시트(PDF) 29 Page - Microchip Technology |
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PIC16F883-E/MLQTP 데이터시트(HTML) 29 Page - Microchip Technology |
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29 / 288 page  © 2007 Microchip Technology Inc. Preliminary DS41291D-page 27 PIC16F882/883/884/886/887 TABLE 2-2: PIC16F882/883/884/886/887 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1 Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Page Bank 1 80h INDF Addressing this location uses contents of FSR to address data memory (not a physical register) xxxx xxxx 37,213 81h OPTION_REG RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 30,214 82h PCL Program Counter’s (PC) Least Significant Byte 0000 0000 37,213 83h STATUS IRP RP1 RP0 TO PD ZDC C 0001 1xxx 29,213 84h FSR Indirect Data Memory Address Pointer xxxx xxxx 37,213 85h TRISA TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 1111 1111 39,214 86h TRISB TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 48,214 87h TRISC TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 53,214 88h TRISD(3) TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0 1111 1111 57,214 89h TRISE — — — — TRISE3 TRISE2(3) TRISE1(3) TRISE0(3) ---- 1111 59,214 8Ah PCLATH — — — Write Buffer for the upper 5 bits of the Program Counter ---0 0000 37,213 8Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF(1) 0000 000x 31,213 8Ch PIE1 — ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE -000 0000 32,214 8Dh PIE2 OSFIE C2IE C1IE EEIE BCLIE ULPWUIE — CCP2IE 0000 00-0 33,214 8Eh PCON — — ULPWUE SBOREN — —POR BOR --01 --qq 36,214 8Fh OSCCON — IRCF2 IRCF1 IRCF0 OSTS HTS LTS SCS -110 q000 62,214 90h OSCTUNE — — — TUN4 TUN3 TUN2 TUN1 TUN0 ---0 0000 66,214 91h SSPCON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 177,214 92h PR2 Timer2 Period Register 1111 1111 81,214 93h SSPADD(2) Synchronous Serial Port (I2C mode) Address Register 0000 0000 185,214 93h SSPMSK(2) MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 1111 1111 204,214 94h SSPSTAT SMP CKE D/A PS R/W UA BF 0000 0000 185,214 95h WPUB WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0 1111 1111 49,214 96h IOCB IOCB7 IOCB6 IOCB5 IOCB4 IOCB3 IOCB2 IOCB1 IOCB0 0000 0000 49,214 97h VRCON VREN VROE VRR VRSS VR3 VR2 VR1 VR0 0000 0000 97,214 98h TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 158,214 99h SPBRG BRG7 BRG6 BRG5 BRG4 BRG3 BRG2 BRG1 BRG0 0000 0000 161,214 9Ah SPBRGH BRG15 BRG14 BRG13 BRG12 BRG11 BRG10 BRG9 BRG8 0000 0000 161,214 9Bh PWM1CON PRSEN PDC6 PDC5 PDC4 PDC3 PDC2 PDC1 PDC0 0000 0000 144,214 9Ch ECCPAS ECCPASE ECCPAS2 ECCPAS1 ECCPAS0 PSSAC1 PSSAC0 PSSBD1 PSSBD0 0000 0000 141,214 9Dh PSTRCON — — — STRSYNC STRD STRC STRB STRA ---0 0001 145,214 9Eh ADRESL A/D Result Register Low Byte xxxx xxxx 99,214 9Fh ADCON1 ADFM —VCFG1 VCFG0 — — — — 0-00 ---- 105,214 Legend: – = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented Note 1: MCLR and WDT Reset do not affect the previous value data latch. The RBIF bit will be cleared upon Reset but will set again if the mismatch exists. 2: Accessible only when SSPCON register bits SSPM<3:0> = 1001. 3: PIC16F884/PIC16F887 only. |
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