H838024R datasheet(92/697 Pages) RENESAS

부품명	H838024R

상세설명	Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series

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Section 2 CPU

Rev. 7.00 Mar 10, 2005 page 50 of 652

REJ09B0042-0700

2.5.6

Branching Instructions

Table 2.9 describes the branching instructions. Figure 2.8 shows their object code formats.

Table 2.9

Branching Instructions

Instruction

Size

Function

Bcc

—

Branches to the designated address if condition cc is true. The

branching conditions are given below.

Mnemonic

Description

Condition

BRA (BT)

Always (true)

Always

BRN (BF)

Never (false)

Never

BHI

High

∨ Z = 0

BLS

Low or same

∨ Z = 1

BCC (BHS)

Carry clear (high or same)

C = 0

BCS (BLO)

Carry set (low)

C = 1

BNE

Not equal

Z = 0

BEQ

Equal

Z = 1

BVC

Overflow clear

V = 0

BVS

Overflow set

V = 1

BPL

Plus

N = 0

BMI

Minus

N = 1

BGE

Greater or equal

⊕ V = 0

BLT

Less than

⊕ V = 1

BGT

Greater than

∨ (N ⊕ V) = 0

BLE

Less or equal

∨ (N ⊕ V) = 1

JMP

—

Branches unconditionally to a specified address

BSR

—

Branches to a subroutine at a specified address

JSR

—

Branches to a subroutine at a specified address

RTS

—

Returns from a subroutine

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