H838024R datasheet(12/697 Pages) RENESAS

12 / 697 page

Rev. 7.00 Mar 10, 2005 page xii of xlii

Item

Page

Revision (See Manual for Details)

3.3.2 Interrupt

Control Registers

Interrupt Request

Bit 1

Table amended

Setting conditions:

When the timer C counter value overflows

or underflows

4.2 System Clock

Generator

Connecting a Ceramic

Oscillator

Figure 4.5(2) Typical

Connection to

Ceramic Oscillator

(H8/38024S,

H8/38124 Group)

108

Table and notes amended

Frequency

2.0 MHz

10.0 MHz

16.0 MHz*1

20.0 MHz*2

Murata

Ceramic

oscillator

Products name

CSTCC2M00G53-B0

CSTCC2M00G56-B0

CSTLS10M0G53-B0

CSTLS10M0G56-B0

CSTLS16M0X53-B0

CSTLS20M0X53-B0

15 pF

±20%

47 pF

±20%

15 pF

±20%

47 pF

±20%

15 pF

±20%

15 pF

±20%

C1, C2

Recommendation

value

Notes: Circuit constants should be determined in consultation

with the resonator manufacturer.

1. This does not apply to the H8/38024S Group.

2. H8/38124 Group only

Notes on Board

Design

Figure 4.6 Board

Design of Oscillator

Circuit

109

Figure amended

OSC

Signal A

Signal B

To be avoided

××

4.6 Notes on

H8/38124 Group

118

Description amended

Consequently, even if the on-chip oscillator is selected when

using the on-chip emulator, pins OSC1 and OSC2 should be

connected to an oscillator, or an external clock should be

supplied.

5.1 Overview

Table 5.1 Operating

Modes

119

Table amended

Operating Mode

Description

Subactive mode

The CPU and all on-chip peripheral functions are operable on

the subclock in low-speed operation

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