 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
CS42428 데이터시트(PDF) 28 Page - Cirrus Logic |
|
|
|||||||||||||||||||||||||||||
CS42428 데이터시트(HTML) 28 Page - Cirrus Logic |
|
|
28 / 73 page  28 DS605F1 CS42428 Left C ha nnel R ig ht C ha nnel DAC_SDINx ADC_SDOUT +3 +2 +1 +5 +4 -1 -2 -3 -4 -5 +3 +2 +1 +5 +4 -1 -2 -3 -4 MSB MSB LSB LSB DAC_LRCK ADC_LRCK DAC_SCLK ADC_SCLK Figure 12. I²S Serial Audio Formats I²S Mode, Data Valid on Rising Edge of SCLK Bits/Sample SCLK Rate(s) Notes Master Slave 16 64 Fs 48, 64, 128 Fs Single-Speed Mode 64 Fs 64 Fs Double-Speed Mode 64 Fs 64 Fs Quad-Speed Mode 18 to 24 64, 128, 256 Fs 48, 64, 128 Fs Single-Speed Mode 64 Fs 64 Fs Double-Speed Mode 64 Fs 64 Fs Quad-Speed Mode DAC_LR CK ADC_LR CK DAC_SC LK ADC_SC LK Left Channel R ight C hannel DAC_SDINx ADC_SDO UT +3 +2 +1 +5 +4 -1 -2 -3 -4 -5 +3 +2 +1 +5 +4 -1 -2 -3 -4 MSB LSB MSB LSB Figure 13. Left-Justified Serial Audio Formats Left-Justified Mode, Data Valid on Rising Edge of SCLK Bits/Sample SCLK Rate(s) Notes Master Slave 16 64 Fs 32, 48, 64, 128 Fs Single-Speed Mode 64 Fs 32, 64 Fs Double-Speed Mode 64 Fs 32, 64 Fs Quad-Speed Mode 18 to 24 64, 128, 256 Fs 48, 64, 128 Fs Single-Speed Mode 64 Fs 64 Fs Double-Speed Mode 64 Fs 64 Fs Quad-Speed Mode |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
