PM7367 datasheet(40/323 Pages) PMC

40 / 323 page

PM7367 FREEDM-32P32

DATA SHEET

PMC-1991499

ISSUE 2

FRAME ENGINE AND DATA LINK MANAGER

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE

Table 4 – Production Test Interface Signals (0 - Multiplexed)

Pin Name

Type

No.

Function

TA[0]

TA[1]

TA[2]

TA[3]

TA[4]

TA[5]

TA[6]

TA[7]

TA[8]

TA[9]

TA[10]

Input

The test mode address bus (TA[10:0]) selects

specific registers during production test

(PMCTEST set high) read and write accesses.

TA[10:0] replace RD[20:10] when PMCTEST is

set high.

TA[11]/TR

Input

The test register select signal (TA[11]/TRS)

selects between normal and test mode register

accesses during production test (PMCTEST set

high). TRS is set high to select test registers and

is set low to select normal registers. TA[11]/TRS

replaces RD[21] when PMCTEST is set high.

TRDB

Input

The test mode read enable signal (TRDB) is set

low during FREEDM-32P32 register read

accesses during production test (PMCTEST set

high). The FREEDM-32P32 drives the test data

bus (TDAT[15:0]) with the contents of the

addressed register while TRDB is low. TRDB

replaces RD[22] when PMCTEST is set high.

TWRB

Input

The test mode write enable signal (TWRB) is set

low during FREEDM-32P32 register write

accesses during production test (PMCTEST set

high). The contents of the test data bus

(TDAT[15:0]) are clocked into the addressed

replaces RD[23] when PMCTEST is set high.

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