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PM7367 데이터시트(PDF) 152 Page - PMC-Sierra, Inc |
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PM7367 데이터시트(HTML) 152 Page - PMC-Sierra, Inc |
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152 / 323 page ![]() PM7367 FREEDM-32P32 DATA SHEET PMC-1991499 ISSUE 2 FRAME ENGINE AND DATA LINK MANAGER PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE 138 TSTD: The telecom standard bit (TSTD) controls the bit ordering of the HDLC data transferred to the PCI host. When TSTD is set low, the least significant bit of the each byte on the PCI bus (AD[0], AD[8], AD[16] and AD[24]) is the first HDLC bit received and the most significant bit of each byte (AD[7], AD[15], AD[23] and AD[31]) is the last HDLC bit received (datacom standard). When TSTD is set high, AD[0], AD[8], AD[16] and AD[24] are the last HDLC bit received and AD[7], AD[15], AD[23] and AD[31] are the first HDLC bit received (telecom standard). LENCHK: The packet length error check bit (LENCHK) controls the checking of receive packets that are longer than the maximum programmed length. When LENCHK is set high, receive packets are aborted and the remainder of the frame discarded when the packet exceeds the maximum packet length given by MAX[15:0]. When LENCHK is set low, receive packets are not checked for maximum size and MAX[15:0] must be set to 'hFFFF. |
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