TDA4VEN...Q1 datasheet(223/236 Pages) TI

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8.3 Clock Routing Guidelines

8.3.1 Oscillator Routing

When designing the printed-circuit board:

• Place all crystal circuit components as close as possible to the respective device pins.

• Route the crystal circuit traces on the outer layer of the PCB and minimize trace lengths to reduce parasitic

capacitance and minimize crosstalk from other signals.

• Place a continuous ground plane on the adjacent layer of the PCB such that it is under all crystal circuit

components and crystal circuit traces.

• Route a ground guard around the crystal circuit components to shield it from any adjacent signals routed on

the same layer as the crystal circuit traces. Insert multiple vias to stitch down the ground guard such that it

does not have any unterminated stubs.

• Route a ground guard between the MCU_OSC0_XI and MCU_OSC0_XO signals to shield the

MCU_OSC0_XI signal from the MCU_OSC0_X0 signal. Insert multiple vias to stitch down the ground guard

such that it does not have any unterminated stubs.

• Connect all crystal circuit ground connections and ground guard connections directly to the adjacent layer

ground plane, and the device VSS ground plane if they are implemented separately on different layers of the

PCB.

Note

Implementing a ground guard between the MCU_OSC0_XI and MCU_OSC0_XO signals is critical

to minimize shunt capacitance between the two signals. Routing these two signals adjacent to each

other without a ground guard between them will effectively reduce the gain of the oscillator amplifier,

which reduces its ability to start oscillation.

Device

MCU_OSC0_XI

MCU_OSC0_XO

GND vias

GND guard

GND vias

GND plane

Figure 8-6. MCU_OSC0 PCB requirements

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TDA4VEN-Q1, TDA4AEN-Q1

SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024

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TDA4VEN...Q1 데이터시트(PDF) 223 Page - Texas Instruments