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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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PPC405EP 데이터시트(PDF) 5 Page - Applied Micro Circuits Corporation |
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PPC405EP 데이터시트(HTML) 5 Page - Applied Micro Circuits Corporation |
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5 / 50 page  PPC405EP – PowerPC 405EP Embedded Processor Revision 1.07 – September 10, 2007 AMCC 5 Data Sheet Figure 1. PPC405EP Embedded Controller Functional Block Diagram The PPC405EP is designed using the IBM Microelectronics Blue LogicTM methodology in which major functional blocks are integrated together to create an application-specific ASIC product. This approach provides a consistent way to create complex ASICs using IBM CoreConnectTM Bus Architecture. PPC405 Processor Core DOCM IOCM DCU ICU OCM Control OCM SRAM DCR Bus 16KB On-chip Peripheral Bus (OPB) GPIO IIC GPT UART MAL Ethernet DMA Bridge Processor Local Bus (PLB) SDRAM PCI Bridge External Bus Controller Controller Clock Control Reset Power Mgmt JTAG Trace Timers MMU MII Controller OPB Interrupt Controller Arb 29-bit addr 16-bit data 13-bit addr 32-bit data Universal I-Cache D-Cache (4-Channel) 66 MHz max (async) DCRs 16KB Arb x2 x2 Event Counters |
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