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STW81100

Table 24. READ-ONLY REGISTER

This register is automatically addressed in the ‘current byte address read mode’.

ILLEGAL_SUBADD: gives “1” if the sub-address value is not correct

ENDCALB: at “0” means end of auto-calibration phase

LOCK_DET: “1” when PLL is locked

INTCAL[4:0]: internal value of the VCO control word

9

Application Information

The STW81100 features three different alternatively selectable bands: direct output (3.3 to 4.4GHz), di-

vided by 2 (1.65 to 2.2GHz) and divided by 4 (850 to 1100MHz). In order to achieve a suitable power level,

a good matching network is needed to adapt the output stage to a 50

Ω load. Moreover, since most of com-

mercial RF components have single ended input and output terminations, a differential to single ended

conversion could be required.

Below different matching configurations for the three bands are suggested as a guideline for the customer

to design its own application board.

9.1 Direct output

If a differential to single conversion is not needed it is possible to match the output buffer of the STW81100

in the simple way shown in

Figure 23.

Figure 23. Differential/single ended output network in the 3.3 - 4.4GHz range

Since most of discrete components for microwave applications are single ended, the user can easily use

one of the two outputs and terminate the other one to 50

Ω with a 3dB power loss.

Alternatively it is possible to combine the 2 outputs in different ways. A first topology for the direct output

(3.3GHz to 4.4GHz) is suggested in

Figure 24. It basically consists of a simple LC balun and a matching

network to adapt the output to a 50

Ω load. The two LC networks shift output signal phase of -90° and +90°

thus combining the 2 outputs. The LC balun is designed for a center frequency of 4GHz and exhibits ap-

MSB

LSB

b7

b6

b5

b4

b3

b2

b1

b0

ILLEG

AL_SUBAD0

END CALB

LOCK_DET

INT CAL4

INT CAL3

INT CAL2

INT CAL1

INT CAL0

2n H

50 O hm

10pF

2n H

10pF

50 O h m

50 O h m

50 O hm