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TMP91CW60DFG 데이터시트(PDF) 69 Page - Toshiba Semiconductor |
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TMP91CW60DFG 데이터시트(HTML) 69 Page - Toshiba Semiconductor |
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69 / 262 page ![]() Page 66 2007-12-03 TMP91CW60 4.6 Port 5 (P50 to P57) Port 5 is an 8-bit general-purpose I/O port. By the reset action, it becomes Hi-Z and becomes analog input permis- sion.All bits of output latch register P5 are set to “1”. There are the following functions in addition to an I/O port. •The input function of the Analog/Digital Converter (AN0 to AN7) Reset operation initializes, P5CR,P5FC to “0”, all bits are set to input port. Figure 4-11 Port 5 A B S Port 5 P50 to P57 (AN0 to AN7) S AD Function control (on bit basis) Direction control (on bit basis) P5FC write P5CR write Reset P5 write P5 read AD read |
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