TMP86FS23UG datasheet(69/252 Pages) TOSHIBA

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Page 57

TMP86FS23UG

5.4 Port P5 (P57 to P50)

Port P5 is an 8-bit input/output port which can be configured as an input or an output in one-bit unit. Port P5 is also

used as a segment output of LCD. Input/output mode is specified by the P5 control register (P5CR).

When used as an input port, the corresponding bit of P5CR and P5LCR should be cleared to “0”.

When used as an output port, the corresponding bit of P5CR should be set to “1”, and the respective P5LCR bit

should be cleared to “0”.

When used as a segment pins of LCD, the respective bit of P5LCR should be set to “1”.

During reset, the output latch (P5DR), P5CR and P5LCR are initialized to “0”.

When the bit of P5CR and P5LCR is “0”, the corresponding bit data by read instruction is a terminal input data.

When the bit of P5CR is “0” and that of P5LCR is “1”, the corresponding bit data by read instruction is always “0”.

When the bit of P5CR is “1”, the corresponding bit data by read instruction is the value of P5DR.

Note: Asterisk (*) indicates “1” or “0” either of which can be selected.

Figure 5-5 Port P5

Table 5-5 Register Programming for Multi-function Ports

Function

Programmed Value

P5DR

P5CR

P5LCR

Port input

“0”

Port “0” output

“0”

“1”

“0”

Port “1” output

“1”

“0”

LCD segment output

“1”

Table 5-6 Values Read from P5DR and Register Programming

Conditions

Values Read from P5DR

P5CR

P5LCR

“0”

Terminal input data

“0”

“1”

“0”

“1”

“0”

Output latch contents

“1”

P5LCRi

Output latch

Data output (P5DRi)

LCD data output

STOP

OUTEN

P5LCRi input

P5CRi

P5CRi input

Data input (P5DRi)

P5i

Note:i=7 to 0

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