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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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M58BW016DB 데이터시트(PDF) 32 Page - STMicroelectronics |
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M58BW016DB 데이터시트(HTML) 32 Page - STMicroelectronics |
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32 / 69 page  Command interface M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB 32/69 4.10 Set Burst Configuration Register command The Set Burst Configuration Register command is used to write a new value to the Burst Configuration Control Register which defines the burst length, type, X and Y latencies, Synchronous/Asynchronous Read mode and the valid Clock edge configuration. Two Bus Write cycles are required to issue the Set Burst Configuration Register command. The first cycle writes the setup command and the address corresponding to the Set Burst Configuration Register content. The second cycle writes the Burst Configuration Register data and the confirm command. Once the command is issued the memory returns to Read mode as if a Read Memory Array command had been issued. The value for the Burst Configuration Register is always presented on A0-A15. M0 is on A0, M1 on A1, etc.; the other address bits are ignored. Table 9. Commands(1) 1. X = Don’t care; RA = Read Address, RD = Read Data, ID = Device Code, SRD = Status Register Data, PA = Program Address; PD = Program Data, QA = Query Address, QD = Query Data, BA = Any address in the Block, BCR = Burst Configuration Register value. Command Bus operations 1st cycle 2nd cycle Op. Addr. Data Op. Addr. Data Read Memory Array ≥ 2 Write X FFh Read RA RD Read Electronic Signature (manufacturer code) ≥ 2 Write X 90h Read 00000h 20h Read Electronic Signature (device code) ≥ 2 Write X 90h Read 00001h IDh Read Electronic Signature (Burst Configuration Register) ≥ 2 Write X 90h Read 00005h BCRh Read Status Register 2 Write X 70h Read X SRDh Read Query ≥ 2 Write X 98h Read QAh QDh Clear Status Register 1 Write X 50h Block Erase 2 Write X 20h Write BAh D0h Program 2 Write X 40h 10h Write PA PD Program/Erase Suspend 1 Write X B0h Program/Erase Resume 1 Write X D0h Set Burst Configuration Register 2 Write X 60h Write BCRh 03h |
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