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LP55281

SNVS458D – JUNE 2007 – REVISED OCTOBER 2016

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Copyright © 2007–2016, Texas Instruments Incorporated

Electrical Characteristics (continued)

Unless otherwise noted, specifications apply to Functional Block Diagram with: VVDD1 = VVDD2 = 3.6 V, VVDDIO = 2.8 V, CV

DD =

CVDDIO = 100 nF, COUT = CIN = 10 µF, CV

DDA= 1 µF, C

REF = 100 nF, L1 = 4.7 µH, RRGB = 8.2 kΩ and RRT = 82 kΩ, and limits are

for TJ = 25°C.

(1)(2) (3).

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

LOGIC INTERFACE CHARACTERISTICS

VIL

Input low level

–30°C < TA < 85°C

0.2 ×

VDDIO

V

VIH

Input high level

–30°C < TA < 85°C

0.8 ×

VDDIO

V

II

Logic input current

–30°C < TA < 85°C

–1

1

µA

fSCK/SCL

Clock frequency

I2C, –30°C < TA < 85°C

400

kHz

–30°C < TA < 85°C

SPI mode, VDDIO > 1.8 V

13

MHz

–30°C < TA < 85°C

SPI mode,

1.65V

≤ VDDIO < 1.8V

5

MHz

LOGIC INPUT NRST

VIL

Input low level

–30°C < TA < 85°C

0.5

V

VIH

Input high level

–30°C < TA < 85°C

1.2

V

II

Logic input current

–30°C < TA < 85°C

–1

1

µA

tNRST

Reset pulse width

–30°C < TA < 85°C

10

µs

LOGIC OUTPUT SO

VOL

Output low level

ISO = 3 mA VDDIO > 1.8 V

0.3

V

ISO = 3 mA VDDIO > 1.8 V

–30°C < TA < 85°C

0.5

ISO = 2 mA, 1.65V ≤ VDDIO < 1.8 V

0.3

ISO = 2 mA, 1.65V ≤ VDDIO < 1.8 V

–30°C < TA < 85°C

0.5

VOH

Output high level

ISO = –3 mA, VDDIO > 1.8 V

VDDIO –

0.3

V

ISO = –3 mA, VDDIO > 1.8 V

–30°C < TA < 85°C

VDDIO –

0.5

ISO = –2 mA, 1.65V ≤ VDDIO < 1.8 V

VDDIO –

0.3

ISO = –2 mA, 1.65V ≤ VDDIO < 1.8 V

–30°C < TA < 85°C

VDDIO –

0.5

IL

Output leakage current

VSO = 2.8 V, –30°C < TA < 85°C

1

µA

LOGIC OUTPUT SDA

VOL

Output low level

ISDA = 3 mA

0.3

V

ISDA = 3 mA, –30°C < TA < 85°C

0.5