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VS6724 데이터시트(PDF) 108 Page - STMicroelectronics |
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VS6724 데이터시트(HTML) 108 Page - STMicroelectronics |
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108 / 118 page ![]() Electrical characteristics VS6724 108/118 6.6 I²C slave interface VS6724 contains an I²C-type interface using two signals: a bidirectional serial data line (SDA) and an input-only serial clock line (SCL). See PLL operation for detailed description of protocol. Figure 40. Voltage level specification Table 60. Serial interface voltage levels(1) Symbol Parameter Standard mode Fast mode Unit Min. Max. Min. Max. VHYS Hysteresis of Schmitt Trigger Inputs VDD > 2 V VDD < 2V N/A N/A N/A N/A 0.05 VDD 0.1 VDD - - V V VOL1 VOL3 LOW level output voltage (open drain) at 3mA sink current VDD > 2 V VDD < 2V 0 N/A 0.4 N/A 0 0 0.4 0.2 VDD V V VOH HIGH level output voltage N/A N/A 0.8 VDD V tOF Output fall time from VIHmin to VILmax with a bus capacitance from 10 pF to 400 pF - 250 20+0.1Cb (2) 250 ns tSP Pulse width of spikes which must be suppressed by the input filter N/A N/A 0 50 ns 1. Maximum VIH = VDDmax + 0.5 V 2. Cb = capacitance of one bus line in pF VIH = 0.7 * VDD VIL = 0.3 * VDD VOH = 0.8 * VDD VOL = 0.2 * VDD Input voltage levels Output voltage levels |
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