TLC320AD50CSLASHI datasheet(27/54 Pages) TI2

27 / 54 page

2–12

ADC input. These input sources are selected by bits D4 and D5 of control register 1. The default condition self-biases

the input since the register default value selects INP and INM as the source for both the ADC and monitor amplifier

input (see Figure 2–16). A simple single-pole antialias filter with low output impedance must be connected to INP and

INM (also AUXP and AUXM, if used).

VINP

INP

VINM

INM

2.5 V

35 k

Ω

35 k

Ω

Figure 2–16. INP and INM Internal Self-Biased (2.5 V) Circuit

2.9.1

Analog Output

The OUTP and OUTM are differential outputs and can drive a typical 600-

Ω load directly. Figure 2–17 shows the circuit

when load is ground referenced.

10 k

Ω

10 k

Ω

TLE2062

10 k

Ω

–5 V

5 V

10 k

Ω

Load

OUTM

OUTP

Figure 2–17. Differential Output Drive (Ground Referenced)

OUTP (Solid Line)

OUTM (Dashed Line)

4 V

2.5 V

1 V

(Virtual 0)

Digital Input Code

Analog Output Voltage

(+FS) 0111 1111 1111 1111

(Virtual 0) 0000 0000 0000 0000

(–FS) 1000 0000 0000 0000

OUT +

4 V

2.5 V

1 V

OUT –

1 V

2.5 V

4 V

Figure 2–18. Digital Input Code vs Analog Output Voltage

TLC320AD50C/I 데이터시트(PDF) 27 Page - Texas Instruments

TLC320AD50C/I 데이터시트(HTML) 27 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54

데이터시트 다운로드

링크 URL