DIX4192IPFB datasheet(3/71 Pages) TI2

3 / 71 page

DIX4192

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SBFS031F – FEBRUARY 2006 – REVISED SEPTEMBER 2016

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5 Description (continued)

The DIX4192 device is configured using on-chip control registers and data buffers, which are accessed through

either a 4-wire serial peripheral interface (SPI) port, or a 2-wire Philips I2C bus interface. Status registers provide

access to a variety of flag and error bits, which are derived from the various function blocks. An open-drain

interrupt output pin is provided, and is supported by flexible interrupt reporting and mask options through control

functions.

The DIX4192 device requires a 1.8-V core logic supply, in addition to a 3.3-V supply for powering portions of the

DIR, DIT, and line driver and receiver functions. A separate logic I/O supply supports operation from 1.65 V to

3.6 V, providing compatibility with low voltage logic interfaces typically found on digital signal processors and

programmable logic devices. The DIX4192 device is available in a lead-free, TQFP-48 package, and is pin- and

6 Device Comparison Table

PART NUMBER

1.8 V IO

MULTI-CH PCM

ADC

PCM PORTS

S/PDIF PORTS

DIX4192

Yes

4 differential Line IN and 1

differential Line Out

PCM9211

Yes

Up to 3 IN and up to 3

Out

Up to 12 single-ended IN

and up to 2 single-ended

Out

DIX9211

Yes

Up to 3 IN and up to 3

Out

Up to 12 single-ended IN

and up to 2 single-ended

Out

DIX4192IPFB 데이터시트(PDF) 3 Page - Texas Instruments