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DIX4192IPFB 데이터시트(PDF) 41 Page - Texas Instruments

부품명 DIX4192IPFB
상세설명  DIX4192 Integrated Digital Audio Interface Receiver and Transmitter
PDF  71 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

DIX4192IPFB 데이터시트(HTML) 41 Page - Texas Instruments

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DIX4192
www.ti.com
SBFS031F – FEBRUARY 2006 – REVISED SEPTEMBER 2016
Product Folder Links: DIX4192
Submit Documentation Feedback
Copyright © 2006–2016, Texas Instruments Incorporated
Figure 48. Register 19: Receiver Interrupt Mode Register 2
7 (MSB)
6
5
4
3
2
1
0 (LSB)
CSCRCM1
CSCRCM0
PARITYM1
PARITYM0
VBITM1
VBITM0
BPERRM1
BPERRM0
Table 27. Register 19: Receiver Interrupt Mode Register 2 Field Descriptions
CSCRCM[1:0]
Channel Status CRC Error Interrupt Mode
CSCRCM1
CSCRCM0
Interrupt Active State
0
0
Rising edge active (default)
0
1
Falling edge active
1
0
Level active
1
1
Reserved
PARITYM[1:0]
Parity Error Interrupt Mode
PARITYM1
PARITYM0
Interrupt Active State
0
0
Rising edge active (default)
0
1
Falling edge active
1
0
Level active
1
1
Reserved
VBITM[1:0]
Validity Error Interrupt Mode
VBITM1
VBITM0
Interrupt Active State
0
0
Rising edge active (default)
0
1
Falling edge active
1
0
Level active
1
1
Reserved
BPERRM[1:0]
Biphase Encoding Error Interrupt Mode
BPERRM1
BPERRM0
Interrupt Active State
0
0
Rising edge active (default)
0
1
Falling edge active
1
0
Level active
1
1
Reserved
Figure 49. Register 1A: Receiver Interrupt Mode Register 3
7 (MSB)
6
5
4
3
2
1
0 (LSB)
0
0
0
0
0
0
OSLIPM1
OSLIPM0
Table 28. Register 1A: Receiver Interrupt Mode Register 3 Field Descriptions
OSLIPM[1:0]
Receiver Output Data Slip Error Interrupt Mode
OSLIPM1
OSLIPM0
Interrupt Active State
0
0
Rising edge active (default)
0
1
Falling edge active
1
0
Level active
1
1
Reserved



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