ADS5294IPFPR datasheet(38/82 Pages) TI2

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D15

D14

D13

D12

D11

D10

SDATA

SCLK

CSZ

SLOADS

SLOADH

SCLK

DSU

RESET

ADS5294

SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018

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Programming (continued)

9.5.1.1 Register Initialization

After power-up, initialize the internal registers to the respective default values. Initialization occurs in one of two

ways:

1. Through a hardware reset, by applying a high pulse on the RESET pin.

2. Through a software reset: using the serial interface, set the RST bit high. Setting this bit initializes the

internal registers to the respective default values and then self-resets the bit low. In this case, the RESET pin

stays low (inactive).

Figure 51. Serial Interface Timing

Please refer to Serial Interface Timing Requirements for more details.

9.5.1.2 Serial Register Readout

The device includes a mode where the contents of the internal registers can be read back on the SDOUT pin.

This mode is useful as a diagnostic check to verify the serial interface communication between the external

controller and the ADC.

By default, after power up and device reset, the SDOUT pin is in the high-impedance state. When the readout

mode is enabled using the register bit <READOUT>, SDOUT outputs the contents of the selected register

serially, described as follows.

•

Set register bit <READOUT> = 1 to put the device in serial readout mode. This setting disables any further

writes into the internal registers, EXCEPT the register at address 1.

–

Note that the <READOUT> bit itself is also located in register 1.

The device can exit readout mode by writing <READOUT> to 0.

Only the contents of register at address 1 cannot be read in the register readout mode.

•

Initiate a serial interface cycle specifying the address of the register (A7–A0) whose content is to be read.

•

The device serially outputs the contents (D15–D0) of the selected register on the SDOUT pin.

•

The external controller can latch the contents at the rising edge of SCLK.

•

To exit the serial readout mode, reset register bit <READOUT> = 0, which enables writes into all registers of

the device. At this point, the SDOUT pin enters the high-impedance state.

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