전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

ADS5294IPFPR 데이터시트(PDF) 56 Page - Texas Instruments

부품명 ADS5294IPFPR
상세설명  ADS5294 Octal-Channel 14-Bit 80-MSPS High-SNR and Low-Power ADC
PDF  82 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
Logo TI2 - Texas Instruments

ADS5294IPFPR 데이터시트(HTML) 56 Page - Texas Instruments

Back Button ADS5294IPFPR Datasheet HTML 52Page - Texas Instruments ADS5294IPFPR Datasheet HTML 53Page - Texas Instruments ADS5294IPFPR Datasheet HTML 54Page - Texas Instruments ADS5294IPFPR Datasheet HTML 55Page - Texas Instruments ADS5294IPFPR Datasheet HTML 56Page - Texas Instruments ADS5294IPFPR Datasheet HTML 57Page - Texas Instruments ADS5294IPFPR Datasheet HTML 58Page - Texas Instruments ADS5294IPFPR Datasheet HTML 59Page - Texas Instruments ADS5294IPFPR Datasheet HTML 60Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 56 / 82 page
background image
ADCLKp
LCLKp
OUTp
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 00
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 10
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 01
PHASE_DDR<1:0> = 11
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 10
56
ADS5294
SLAS776E – NOVEMBER 2011 – REVISED APRIL 2018
www.ti.com
Product Folder Links: ADS5294
Submit Documentation Feedback
Copyright © 2011–2018, Texas Instruments Incorporated
•
k is set as described by the HPF_corner registers (one for each channel).
(4)
The HPF_EN bit in each register must be set to enable the HPF feature for each channel.
9.6.1.11 Bit-Clock Programmability
Table 19. Bit-Clock Programmability
ADDR.
(HEX)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NAME
42
X
X
PHASE_DDR<1:0>
46
1
X
EN_SDR
46
1
X
FALL_SDR
The output interface of the ADS5294 is normally a DDR interface, with the LCLK rising edge and falling edge
transitions in the middle of alternate data windows. This default phase is shown in Figure 57.
Figure 57. Default Phase of LCLK
The phase of LCLK is programmed relative to the output frame clock and data using bits PHASE_DDR<1:0>.
The LCLK phase modes are shown in Figure 58.
Figure 58. Phase Programmability Modes for LCLK



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com