L9396 datasheet(51/109 Pages) STMICROELECTRONICS

51 / 109 page

DS12539 Rev 10

51/109

L9396

Remote sensor interface

109

WSICTRL register stores Remote sensor control field.

Bits 3 down to 0 of this register are used to enable WSS interfaces. These bits can be

written only when INIT bit (bit 5) of this register is '1'. When INIT is cleared to 0, also bits 3

down to 0 are cleared to 0. Enable/Disable state of interfaces is maintained and it can be

monitored by reading back RS_DATA_RSDR registers.

Bits 8 and 9 of this register can be changed only when INIT bit is '1'. When INIT is cleared to

'0' these bits maintain their values.

Bit 3

WSI_FIX_THRESH: WSI selection

of fixed or auto adaptive thresholds

0 => auto adaptive thresholds

1 => fixed thresholds

SSM_RESET

LBIST

Bit 2

WSFILT_CONF (see bits 6 to 9)

SSM_RESET

LBIST

Bit 1:0

STS: Sensor Type Selection

00 => Two level, Standard

01 => Three level, VDA

10 => PWM Encoded, 2 level, 2

edges/tooth

11 => PWM Encoded, 2 level, 1

edge/tooth

SSM_RESET

LBIST

Table 26. RS_CTRL register

ADDR

NAME

TYPE

BITS = 10

0001011

RS_CTRL

9: WSS_EN_SAT_FLAGS, 8: WSS_READ_CURRENT, 5:

INIT, 4:DIAG, 3:0 WSIENA

Table 27. RS_CTRL register bit description

Data Field

Description

Reset Value

Reset Event

Bit 9

WSS EN SAT FLAGS: Allow to

read WSS current saturation flags

available in RS_DATA_RSDR_12

0 => disable flags

1 => enable flags

SSM_RESET

LBIST

Bit 8

WSS READ CURRENT: Allow to

read instantaneous converted

current in bit [9:0] of

RS_DATA_RSDR_4/5/6/7

0 => reading base current

1 => reading instantaneous current

SSM_RESET

LBIST

Table 25. RS_CFG_2_3 register bit description (continued)

Data Field

Description

Reset Value

Reset Event

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