| 전자부품 데이터시트 검색엔진 |
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L9963E 데이터시트(PDF) 8 Page - STMicroelectronics |
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L9963E 데이터시트(HTML) 8 Page - STMicroelectronics |
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8 / 184 page ![]() Pin # Pin name Description I/O type(1) 36 C4 Cell voltage input. Connect to the positive terminal of 4th cell. AI 37 C5 Cell voltage input. Connect to the positive terminal of 5th cell. AI 38 S5 Cell balancing FET control output for 5th cell. AO 39 B6_5 Common terminal for cell balancing S5 and S6. AO 40 S6 Cell balancing FET control output for 6th cell. AO 41 C6 Cell voltage input. Connect to the positive terminal of 6th cell. AI 42 C7 Cell voltage input. Connect to the positive terminal of 7th cell. AI 43 S7 Cell balancing FET control output for 7th cell. AO 44 B8_7 Common terminal for cell balancing S7 and S8. AO 45 S8 Cell balancing FET control output for 8th cell. AO 46 C8 Cell voltage input. Connect to the positive terminal of 8th cell. AI 47 C9 Cell voltage input. Connect to the positive terminal of 9th cell. AI 48 S9 Cell balancing FET control output for 9th cell. AO 49 B10_9 Common terminal for cell balancing S9 and S10. AO 50 S10 Cell balancing FET control output for 10th cell. AO 51 C10 Cell voltage input. Connect to the positive terminal of 10th cell. AI 52 C11 Cell voltage input. Connect to the positive terminal of 11th cell. AI 53 S11 Cell balancing FET control output for 11th cell. AO 54 B12_11 Common terminal for cell balancing S11 and S12. AO 55 S12 Cell balancing FET control output for 12th cell. AO 56 C12 Cell voltage input. Connect to the positive terminal of 12th cell. AI 57 C13 Cell voltage input. Connect to the positive terminal of 13th cell. AI 58 S13 Cell balancing FET control output for 13th cell. AO 59 B14_13 Common terminal for cell balancing S13 and S14. AO 60 S14 Cell balancing FET control output for 14th cell. AO 61 C14 Cell voltage input. Connect to the positive terminal of 14th cell. AI 62 VBAT Power supply of chip. This pin is also sensed by internal ADC through a voltage divider. Refer to Table 73. P 63 CAP2 Pin2 external bootstrap capacitance. Refer to Table 73. AI 64 CAP1 Pin1 external bootstrap capacitance. Refer to Table 73. AI - GNDEP Ground terminal, connect to AGND plane G 1. I/O type legend: AI = Analog Input; AO = Analog Output; AIO = Analog I/O; DI = Digital Input; DO = DigitalOutput; DIO = Digital I/O; P = Power; G = Ground; NC = Not Connect. L9963E Pin description DS13636 - Rev 12 page 8/184 |
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