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CC113LRGPR 데이터시트(PDF) 55 Page - Texas Instruments

부품명 CC113LRGPR
상세설명  CC113L Value Line Receiver
PDF  87 Pages
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제조업체  TI2 [Texas Instruments]
홈페이지  https://www.ti.com
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CC113LRGPR 데이터시트(HTML) 55 Page - Texas Instruments

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CC113L
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SWRS108B – MAY 2011 – REVISED JUNE 2014
Table 5-26. 0x06: PKTLEN - Packet Length
Bit
Field Name
Reset
R/W
Description
Indicates the packet length when fixed packet length mode
is enabled. If variable packet length mode is used, this
7:0
PACKET_LENGTH
255 (0xFF)
R/W
value indicates the maximum packet length allowed. This
value must be different from 0.
Table 5-27. 0x07: PKTCTRL1 - Packet Automation Control
Bit
Field Name
Reset
R/W
Description
7:5
0 (000)
R/W
Use setting from SmartRF Studio
4
0
R0
Not Used.
Enable automatic flush of RX FIFO when CRC is not OK.
3
CRC_AUTOFLUSH
0
R/W
This requires that only one packet is in the RX FIFO and
that packet length is limited to the RX FIFO size.
When enabled, two status bytes will be appended to the
2
APPEND_STATUS
1
R/W
payload of the packet. The status bytes contain the RSSI
value, as well as CRC OK.
Controls address check configuration of received packages.
Setting
Address check configuration
0 (00)
No address check
1:0
ADR_CHK[1:0]
0 (00)
R/W
1 (01)
Address check, no broadcast
2 (10)
Address check and 0 (0x00) broadcast
Address check and 0 (0x00) and 255 (0xFF)
3 (11)
broadcast
Table 5-28. 0x08: PKTCTRL0 - Packet Automation Control
Bit
Field Name
Reset
R/W
Description
7
R0
Not used
6
1
R/W
Use setting from SmartRF Studio
Format of RX data
Setting
Packet format
0 (00)
Normal mode, use RX FIFO
Synchronous serial mode. Data in on GDO0 and
5:4
PKT_FORMAT[1:0]
0 (00)
R/W
1 (01)
data out on either of the GDOx pins
2 (10)
Reserved
Asynchronous serial mode. Data in on GDO0
3 (11)
and data out on either of the GDOx pins
3
0
R0
Not used
1: CRC calculation enabled
2
CRC_EN
1
R/W
0: CRC calculation disabled
1:0
LENGTH_CONFIG[1:0]
1 (01)
R/W
Configure the packet length
Setting
Packet length configuration
0 (00)
Fixed packet length mode. Length configured in
PKTLEN register
1 (01)
Variable packet length mode. Packet length
configured by the first byte after sync word
2 (10)
Infinite packet length mode
3 (11)
Reserved
Copyright © 2011–2014, Texas Instruments Incorporated
Detailed Description
55
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Product Folder Links: CC113L



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