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PAC1721 데이터시트(PDF) 32 Page - Microchip Technology

부품명 PAC1721
상세설명  Single-Channel Power Monitor with Accumulator, 9V Full Scale Range
PDF  92 Pages
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제조업체  MICROCHIP [Microchip Technology]
홈페이지  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PAC1721 데이터시트(HTML) 32 Page - Microchip Technology

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PAC1721
DS-20007088A-page 32
 2026 Microchip Technology Inc. and its subsidiaries
5.6.4
READ BYTE
Use the Read Byte to read one byte of data from the
specified register address, as shown in Table 5-6.
If an invalid register address is specified, the target
ACKs its address, but NACKs the register address.
The host NACKs the data received from the target by
holding the SMBus data line high after the 8th data bit
is sent.
5.6.5
SEND BYTE
Use the Send Byte to set the internal register pointer to
the correct address location. No data is transferred
during the Send Byte, as shown in Table 5-7.
5.6.6
RECEIVE BYTE
Use the Receive Byte to read data from a register when
the internal register pointer is known to be at the correct
address location. For example, when the address is set
via the Send Byte. This is shown in Table 5-8.
Note:
If the BYTE_COUNT bit is set to 1b in the
SMBUS_SETTINGS register, PAC1721
reports the byte count. This does not
comply with SMBus specifications.
After receiving the register data, if an ACK is received,
the internal register pointer automatically increments.
If instead a NACK is received, then the internal address
pointer remains at the same position.
To continue clocking and reading the next register, the
host sends an ACK after the register data, instead of
sending a NACK followed by a STOP condition.
TABLE 5-6:
READ BYTE
START
Condition
Target
Address
WR
ACK
Register
Address
ACK
START
Condition
1 → 0
YYYY_YYY
00
XXh
01 → 0
Target
Address
RD
ACK
Register
Data
NACK
STOP Condition
YYYY_YYY
10
XXh
10 → 1
TABLE 5-7:
SEND BYTE
START
Condition
Target
Address
WR
ACK
Register
Address
ACK
STOP
Condition
1 → 0
YYYY_YYY
00
XXh
00 →1
TABLE 5-8:
RECEIVE BYTE
START
Condition
Target
Address
RD
ACK
Register Data
NACK
STOP
Condition
1 → 0
YYYY_YYY
10
XXh
10 → 1



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