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L9805 데이터시트(PDF) 83 Page - STMicroelectronics

부품명 L9805
상세설명  Super Smart Power Motor Driver with 8-BIT MCU, CAN Interface, 16K EPROM, 256Bytes RAM, 128 Bytes EEPROM, 10 Bit ADC, WDG, 2 Timers, 2 PWM Modules, Ful
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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L9805 데이터시트(HTML) 83 Page - STMicroelectronics

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L9805
5.9.2 Functional description
5.9.2.1 Read operation (E2LAT=0)
The EEPROM can be read as a normal ROM/RAM
location when the E2LAT bit of the CR register is
cleared. The address decoder selects the desired
byte. The 8 sense amplifiers evaluate the stored
byte which is put on the data bus.
5.9.2.2 Write operation (E2LAT=1)
The EEPROM programming flowchart is shown in
Figure 45.
To access the write mode, E2LAT bit must be set.
Then when a write access to the EEPROM occurs,
the value on the data bus is latched on the 8 data
latches depending on the address. To program the
memory, the E2PGM bit must be set, so the pro-
gramming cycle starts. At the end of the cycle, the
E2PGM bit and E2LAT bit are cleared, and an in-
terrupt could be generated id E2ITE is set.
5.9.2.3 Wait mode
The EEPROM can enter the wait mode by execut-
ing the wait instruction of the micro-controller. The
EEPROM will effectively enter this mode if there is
no programming in progress, in such a case the
EEPROM will finish the cycle and then enter this
low consumption mode.
5.9.2.4 Halt mode
The EEPROM enters the halt mode if the micro-
controller did execute the halt instruction. The
EEPROM will stop the function in progress, and
will enter in this low consumption mode.
Figure 44. EEPROM Programming Cycle
Erase cycle
Write cycle
Tprog
Read operation allowed
Read operation not possible
INTERNAL
PROGRAMMING
VOLTAGE
Write of
data
latches
E2LAT
E2PGM
INTERRUPT
REQUEST
Interrupt
vector fetch



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