L9805 datasheet(88/103 Pages) STMICROELECTRONICS

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L9805

INSTRUCTION SET OVERVIEW (Cont’d)

Indexed (No Offset, Short, Long)

In this mode, the operand is referenced by its

memory address, which is defined by the unsigned

addition of an index register (X or Y) with an offset

which follows the opcode.

The indirect addressing mode consists of three

sub-modes:

Indexed (No Offset)

There is no offset, (no extra byte after the opcode),

and allows 00 - FF addressing space.

Indexed (Short)

The offset is a byte, thus requires only one byte af-

ter the opcode and allows 00 - 1FE addressing

space.

Indexed (long):

The offset is a word, thus allowing 64Kb address-

ing space and requires 2 bytes after the opcode.

Indirect (Short, Long):

The required data byte to do the operation is found

by its memory address, located in memory (point-

er).

The pointer address follows the opcode. The indi-

rect addressing mode consists of two sub-modes:

Indirect (short):

The pointer address is a byte, the pointer size is a

byte, thus allowing 00 - FF addressing space, and

requires 1 byte after the opcode.

Indirect (long):

The pointer address is a byte, the pointer size is a

word, thus allowing 64Kb addressing space, and

No Offset, Long and

Short Indexed

Instruction

Function

Load

Compare

AND, OR, XOR

Logical Operations

ADC, ADD, SUB, SBC

Arithmetic Additions/Sub-

structions operations

BCP

Bit Compare

No Offset and Short

Indexed Instructions

Only

Function

CLR

Clear

INC, DEC

Increment/Decrement

TNZ

Test Negative or Zero

CPL, NEG

1 or 2’s Complement

BSET, BRES

Bit Operations

BTJT, BTJF

Bit Test and Jump Operations

SLL, SRL, SRA, RLC,

RRC

Shift and Rotate Operations

SWAP

Swap Nibbles

CALL, JP

Call or Jump subroutine

Available Long and Short

Indirect Instructions

Function

Load

Compare

AND, OR, XOR

Logical Operations

ADC, ADD, SUB, SBC

Arithmetic Additions/Sub-

structions operations

BCP

Bit Compare

Short Indirect

Instructions Only

Function

CLR

Clear

INC, DEC

Increment/Decrement

TNZ

Test Negative or Zero

CPL, NEG

1 or 2’s Complement

BSET, BRES

Bit Operations

BTJT, BTJF

Bit Test and Jump Operations

SLL, SRL, SRA,

RLC, RRC

Shift and Rotate Operations

SWAP

Swap Nibbles

CALL, JP

Call or Jump subroutine

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