L9805 datasheet(29/103 Pages) STMICROELECTRONICS

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L9805

I/O PORTS (Cont’d)

5.1.2.5 I/O Port Implementation

The I/O port register configurations are resumed

as following.

Port PA(7:0), Port PB(2:0)

RESET status: DR=0, DDR=0 and OR=0 (Input

mode, no interrupt).

These ports offer interrupt capabilities.

5.1.2.6 Dedicated Configurations

Table 5. Port A Configuration

Table 6. Port B Configuration

DDR

MODE

input

no interrupt (pull-up enabled)

input

interrupt (pull-up enabled)

Open-Drain output

Push-Pull output

PORT A

I / O

Function

Input

Output

Alternate

Interrupt

PA0

triggered with pull-up

push-pull/open drain

OCMP2_1: Output Compare

#2 Timer 1

wake-up interrupt

(I0)

PA1

triggered with pull-up

push-pull/open drain

OCMP1_1: Output Compare

#1 Timer 1

wake-up interrupt

(I0)

PA2

triggered with pull-up

push-pull/open drain

ICAP2_1: Input Capture #2

Timer 1

wake-up interrupt

(I0)

PA3

triggered with pull-up

push-pull/open drain

ICAP1_1: Input Capture #1

Timer 1

wake-up interrupt

(I0)

PA4

triggered with pull-up

push-pull/open drain

EXTCLK_1: External Clock

Timer 1

wake-up interrupt

(I0)

PA5

triggered with pull-up

push-pull/open drain

OCMP2_2: Output Compare

#2 Timer 2

wake-up interrupt

(I0)

PA6

triggered with pull-up

push-pull/open drain

OCMP1_2: Output Compare

#1 Timer 2

wake-up interrupt

(I0)

PA7

triggered with pull-up

push-pull/open drain

ICAP2_2: Input Capture #2

Timer 2

wake-up interrupt

(I0)

PORT B

I / O

Function

Input

Output

Alternate

Interrupt

PB0

triggered with pull-up

push-pull/open drain

ICAP1_2: Input Capture #1

Timer 2

wake-up interrupt

(I0)

PB1

triggered with pull-up

push-pull/open drain

EXTCLK_2: External Clock

Timer 2

wake-up interrupt

(I0)

PB21)

Note 1. The PB2 bit is not connected to the external. It must be configured as an Input without interrupt, to be used only as an alternate

function.

Not connected to pad

PWMI: PWM input

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