AT45DB321E datasheet(45/80 Pages) RENESAS

45 / 80 page

DS-AT45DB321E-8784 Rev. N

Page 45

9/1/23

AT45DB321E Datasheet

10.2.1

Exit Ultra-Deep Power-Down

To exit from the Ultra-Deep Power-Down mode, the CS pin must simply be pulsed by asserting the CS pin, waiting

the minimum necessary tCSLU time, and then deasserting the CS pin again. To facilitate simple software

development, a dummy byte opcode can also be entered while the CS pin is being pulsed just as in a normal

operation like the Program Suspend operation; the dummy byte opcode is simply ignored by the device in this

case. After the CS pin has been deasserted, the device exits from the Ultra-Deep Power-Down mode and return

to the standby mode within a maximum time of tXUDPD. If the CS pin is reasserted before the tXUDPD time has

elapsed in an attempt to start a new operation, then that operation is ignored and nothing is performed. The

system must wait for the device to return to the standby mode before normal command operations such as

Continuous Array Read can be resumed.

Since the contents of the SRAM buffers cannot be maintained while in the Ultra-Deep Power-Down mode, the

SRAM buffers contain undefined data when the device returns to the standby mode.

Figure 19. Exit Ultra-Deep Power-Down

ICC

High-impedance

Ultra-Deep Power-Down Mode Current

Active Current

Standby Mode Current

tXUDPD

tCSLU

AT45DB321E 데이터시트(PDF) 45 Page - Renesas Technology Corp