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AT45DB321E 데이터시트(PDF) 20 Page - Renesas Technology Corp |
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AT45DB321E 데이터시트(HTML) 20 Page - Renesas Technology Corp |
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20 / 80 page ![]() DS-AT45DB321E-8784 Rev. N Page 20 9/1/23 © 2023 Renesas Electronics AT45DB321E Datasheet 7.7 Page Erase The Page Erase command can be used to individually erase any page in the main memory array allowing the Buffer to Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program through Buffer 1 command to be used at a later time. To perform a Page Erase with the standard DataFlash page size (528 bytes), an opcode of 81h must be clocked into the device followed by three address bytes comprised of one dummy bits, 13 page address bits (PA12 - PA0) that specify the page in the main memory to be erased, and 10 dummy bits. To perform a Page Erase with the binary page size (512 bytes), an opcode of 81h must be clocked into the device followed by three address bytes comprised of two dummy bits, 13 page address bits (A21 - A9) that specify the page in the main memory to be erased, and nine dummy bits. When a low-to-high transition occurs on the CS pin, the device erases the selected page (the erased state is a Logic 1). The erase operation is internally self-timed and takes place in a maximum time of tPE. During this time, the RDY/BUSY bit in the Status Register indicates that the device is busy. The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase properly. If an erase error arises, it is indicated by the EPE bit in the Status Register. |
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