M48T129YPM datasheet(12/22 Pages) STMICROELECTRONICS

12 / 22 page

M48T129Y, M48T129V

12/22

Figure 10. Chip Enable Controlled, Write AC Waveforms

AI02582

tAVAV

tEHAX

tDVWH

A0-A16

DQ0-DQ7

VALID

tAVEL

tAVWL

tELEH

tWHDX

DATA INPUT

POWER-ON RESET

The M48T129Y/V continuously monitors VCC.

When VCC falls to the power fail detect trip point,

the RST pulls low (open drain) and remains low on

power-up for 40 to 200ms after VCC passes VPFD.

The RST pin is an open drain output and an appro-

priate pull-up resistor to VCC should be chosen to

control the rise time.

CALIBRATING THE CLOCK

The M48T129Y/V is driven by a quartz controlled

oscillator with a nominal frequency of 32,768Hz.

The devices are factory calibrated at 25

°C and

tested for accuracy. Clock accuracy will not ex-

ceed 35 ppm (parts per million) oscillator frequen-

cy error at 25

°C, which equates to about * 1.53

minutes per month. When the Calibration circuit is

properly employed, accuracy improves to better

than +4 ppm at 25

°C. The oscillation rate of crys-

tals changes with temperature. The M48T129Y/V

design employs periodic counter correction. The

calibration circuit adds or subtracts counts from

the oscillator divider circuit at the divide by 256

stage, as shown in Figure 11.

The number of times pulses which are blanked

(subtracted, negative calibration) or split (added,

positive calibration) depends upon the value load-

ed into the five Calibration bits found in the Control

tracting counts slows the clock down.The Calibra-

tion bits occupy the five lower order bits (D4-D0) in

the Control Register 1FFF8h. These bits can be

set to represent any value between 0 and 31 in bi-

nary form. Bit D5 is a Sign bit; ’1’ indicates positive

calibration, ’0’ indicates negative calibration. Cali-

bration occurs within a 64 minute cycle. The first

62 minutes in the cycle may, once per minute,

have one second either shortened by 128 or

lengthened by 256 oscillator cycles. If a binary ’1’

is loaded into the register, only the first 2 minutes

in the 64 minute cycle will be modified; if a binary

6 is loaded, the first 12 will be affected, and so on.

Therefore, each calibration step has the effect of

adding 512 or subtracting 256 oscillator cycles for

every 125, 829, 120 actual oscillator cycles, that is

+4.068 or –2.034 ppm of adjustment per calibra-

tion step in the calibration register. Assuming that

the oscillator is running at exactly 32,768Hz, each

of the 31 increments in the Calibration byte would

represent +10.7 or –5.35 seconds per month

which corresponds to a total range of +5.5 or –2.75

minutes per month. Figure 11 illustrates a TIME-

KEEPER calibration waveform.

Two methods are available for ascertaining how

much calibration a given M48T129Y/V may re-

quire. The first involves setting the clock, letting it

run for a month and comparing it to a known accu-

rate reference and recording deviation over a fixed

period of time.

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