M48T129YPM datasheet(15/22 Pages) STMICROELECTRONICS

15 / 22 page

15/22

M48T129Y, M48T129V

Table 12. Alarm Repeat Modes

RPT4

RPT3

RPT2

RPT1

Alarm Activated

Once per Second

Once per Minute

Once per Hour

Once per Day

Once per Month

Figure 14. Supply Voltage Protection

AI02169

VCC

0.1

µF

DEVICE

VCC

VSS

The IRQ/FT pin is an open drain output which re-

quires a pull-up resistor to VCC for proper opera-

tion. A 500-10k resistor is recommended in order

to control the rise time. The FT bit is cleared on

power-up.

BATTERY LOW WARNING

The M48T129Y/V automatically performs battery

voltage monitoring upon power-up and at factory-

programmed time intervals of approximately 24

hours. The Battery Low (BL) bit, Bit D4 of Flags

voltage is found to be less than approximately

2.5V.

If a battery low is generated during a power-up se-

quence, this indicates that the battery is below ap-

proximately 2.5 volts and may not be able to

maintain data integrity in the SRAM. Data should

be considered suspect and verified as correct.

If a battery low indication is generated during the

24-hour interval check, this indicates that the bat-

tery is near end of life. However, data is not com-

promised due to the fact that a nominal VCC is

supplied.

The M48T129Y/V only monitors the battery when

a nominal VCC is applied to the device. Thus appli-

cations which require extensive durations in the

battery back-up mode should be powered-up peri-

odically (at least once every few months) in order

for this technique to be beneficial. Additionally, if a

battery low is indicated, data integrity should be

verified upon power-up via a checksum or other

technique.

POWER-ON DEFAULTS

Upon application of power to the device, the fol-

lowing register bits are set to a ’0’ state: WDS,

BMB0-BMB4, RB0,RB1, AFE, ABE, W, R and FT.

POWER SUPPLY DECOUPLING

and UNDERSHOOT PROTECTION

ICC transients, including those produced by output

switching, can produce voltage fluctuations, re-

sulting in spikes on the VCC bus. These transients

can be reduced if capacitors are used to store en-

ergy, which stabilizes the VCC bus. The energy

stored in the bypass capacitors will be released as

low going spikes are generated or energy will be

absorbed when overshoots occur. A ceramic by-

pass capacitor value of 0.1

µF (see Figure 14) is

recommended in order to provide the needed fil-

tering. In addition to transients that are caused by

normal SRAM operation, power cycling can gener-

ate negative voltage spikes on VCC that drive it to

values below VSS by as much as one volt. These

negative spikes can cause data corruption in the

SRAM while in battery backup mode. To protect

from these voltage spikes, ST recommends con-

necting a schottky diode from VCC to VSS (cathode

connected to VCC, anode to VSS). (Schottky diode

1N5817 is recommended for through hole and

MBRS120T3 is recommended for surface mount).

M48T129YPM 데이터시트(PDF) 15 Page - STMicroelectronics

M48T129YPM 데이터시트(HTML) 15 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22

데이터시트 다운로드

링크 URL