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L6711 데이터시트(PDF) 46 Page - STMicroelectronics

부품명 L6711
상세설명  3 Phase controller with dynamic VID and selectable DACs
PDF  50 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L6711 데이터시트(HTML) 46 Page - STMicroelectronics

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Layout guidelines
L6711
46/50
18.3
Current sense connections.
Remote Buffer: The input connections for this component must be routed as parallel nets
from the FBG/FBR pins to the load in order to compensate losses along the output power
traces and also to avoid the pick-up of any common mode noise. Connecting these pins in
points far from the load will cause a non-optimum load regulation, increasing output
tolerance.
Current Reading: The Rg resistors have to be placed as close as possible to the CSx- and
CSx+ pins in order to limit the noise injection into the device; this is still valid also for the
Rg(RC)-Cg network used when sensing current across the inductor. The PCB traces
connecting these resistors to the reading point must use dedicated nets, routed as parallel
traces in order to avoid the pick-up of any common mode noise.
Figure 24.
Device orientation (left) and sense nets routing (right: red for Lsense,
black for LSsense)
It's also important to avoid any offset in the measurement and, to get a better precision, to
connect the traces as close as possible to the sensing elements. Symmetrical layout is also
suggested.
Small filtering capacitor can be needed between VOUT and SGND on the CSx- line, placed
near the controller, allowing higher layout flexibility in the current sense connection.
VCCDR
C
R
R
R
R
R
R
C
R



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