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R7FA6T2AB3CFM 데이터시트(PDF) 49 Page - Renesas Technology Corp |
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R7FA6T2AB3CFM 데이터시트(HTML) 49 Page - Renesas Technology Corp |
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49 / 101 page ![]() tDr, tDf tSA tOH tLEAD tTD tLAG tH LSB OUT (Last data) DATA MSB OUT MSB IN DATA LSB IN MSB IN LSB OUT tSU tOD tREL MSB OUT SSn input SCKn CKPOL = 1 input SCKn CKPOL = 0 input MISOn output MOSIn input Note: n = 0 to 4, 9 Figure 2.37 SCI simple SPI mode timing for slave when CKPH = 0 Table 2.27 SCI timing (Simple IIC mode) Conditions: Middle drive output is selected in the Port Drive Capability bit in the PmnPFS register. Parameter Symbol Min Max Unit Note Simple IIC (Standard mode) SCL, SDA input rise time tSr — 1000 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 0 4 × tTcyc ns Data input setup time tSDAS 250 — ns Data input hold time tSDAH 0 — ns SCL, SDA capacitive load Cb*1 — 400 pF Simple IIC (Fast mode) SCL, SDA input rise time tSr — 300 ns SCL, SDA input fall time tSf — 300 ns SCL, SDA input spike pulse removal time tSP 0 4 × tTcyc ns Data input setup time tSDAS 100 — ns Data input hold time tSDAH 0 — ns SCL, SDA capacitive load Cb*1 — 400 pF Note: tTcyc: SCITCLK cycle. Note 1. Cb indicates the total capacity of the bus line. RA6T2 Datasheet 2. Electrical Characteristics R01DS0400EJ0150 Rev.1.50 Jul 2, 2025 Page 49 of 101 |
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