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R7KA8M2AFDCAM 데이터시트(PDF) 254 Page - Renesas Technology Corp

부품명 R7KA8M2AFDCAM
상세설명  Renesas Microcontrollers
PDF  295 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

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Note 1. Test conditions: 0.2% to 99.8% of the analog input voltage range.
Note 2. DNL is measured using the Histogram Method, so the lower limit value is -1.
Note 3. This value is based on a 12-bit resolution.
Table 2.102
A/D conversion characteristics (Hybrid mode)
Conditions: AVCC: 2.7 to 3.63 V, VCC: 2.7 to 3.63 V, VREFH0/VREFH: 2.7 V to AVCC
Parameter
Min
Typ
Max
Unit
Test conditions
Hybrid
mode
Without
channel
dedicated
sample and
hold circuits
Single-
ended
input
High-speed channels
(AN000 to AN005)
(AN006 to AN011)
Offset error *4
—
±0.5
±4
LSB
● ADCLK: 50 MHz
● Sampling time: 8 ADCLK
● Successive approximation time: 5
ADCLK
● Signal source impedance: 50 Ω or
less
● Digital filter: Sinc filter
Gain error *4
—
±1
±5
LSB
DNL differential
nonlinearity
error*2 *3
—
-1 to
+1.5
-1 to
+2.5
LSB
INL integral
nonlinearity
error*2
—
±4
±8
LSB
Middle-speed
channels (AN012 to
AN015) *1
Offset error *4
—
±0.5
±4
LSB
● ADCLK: 50 MHz
● Sampling time: 22 ADCLK
● Successive approximation time: 5
ADCLK
● Signal source impedance: 50 Ω or
less
● Digital filter: Sinc filter
Gain error *4
—
±1
±5
LSB
DNL differential
nonlinearity
error*2 *3
—
-1 to
+2
-1 to
+4
LSB
INL integral
nonlinearity
error*2
—
±4
±8
LSB
Low-speed channels
(AN016 to AN022) *1
Offset error *4
—
±0.5
±4
LSB
● ADCLK: 50 MHz
● Sampling time: 42 ADCLK
● Successive approximation time: 5
ADCLK
● Signal source impedance: 50 Ω or
less
● Digital filter: Sinc filter
Gain error *4
—
±1
±5
LSB
DNL differential
nonlinearity
error*2*3
—
-1 to
+2
-1 to
+4
LSB
INL integral
nonlinearity
error*2
—
±4
±12
LSB
Differenti
al input
High-speed channels
(AN000 to AN005)
(AN006 to AN011)
Offset error *4
—
±0.25
±2
LSB
● ADCLK: 50 MHz
● Sampling time: 8 ADCLK
● Successive approximation time: 5
ADCLK
● Signal source impedance: 50 Ω or
less
● Digital filter: Sinc filter
Gain error *4
—
±0.5
±2.5
LSB
DNL differential
nonlinearity
error*2 *3
—
-1 to
+1.5
-1 to
+2
LSB
INL integral
nonlinearity
error*2
—
±3
±6
LSB
With channel
dedicated
sample and
hold circuits
Single-
ended
input
High-speed channels
(AN000 to AN005)
(AN006 to AN011)
Offset error *4
—
±0.5
±4
LSB
● ADCLK: 50 MHz
● Sampling time of channel-
dedicated sample-and-hold
circuits: * ADCLK
● Hold mode switching time of
channel dedicated sample-and-
hold circuits: * ADCLK
● Sampling time: * ADCLK
● Successive approximation time: *
ADCLK
● Signal source impedance: 50 Ω or
less
● Digital filter: Sinc filter
Gain error *4
—
±0.5
±4
LSB
DNL differential
nonlinearity
error*2 *3
—
±1
-1 to
+2
LSB
INL integral
nonlinearity
error*2
—
±12
±16
LSB
Differenti
al input
High-speed channels
(AN000 to AN005)
(AN006 to AN011)
Offset error *4
—
±0.5
±4
LSB
● ADCLK: 50 MHz
● Sampling time of channel-
dedicated sample-and-hold
circuits: * ADCLK
● Hold mode switching time of
channel dedicated sample-and-
hold circuits: * ADCLK
● Sampling time: * ADCLK
● Successive approximation time: *
ADCLK
● Signal source impedance: 50 Ω or
less
● Digital filter: Sinc filter
Gain error *4
—
±0.5
±4
LSB
DNL differential
nonlinearity
error*2 *3
—
±1
-1 to
+2
LSB
INL integral
nonlinearity
error*2
—
±4
±16
LSB
RA8M2 Datasheet
2. Electrical Characteristics
R01DS0438EJ0130 Rev.1.30
Feb 27, 2026
Page 254 of 295



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