| 전자부품 데이터시트 검색엔진 |
|
ST72589BW 데이터시트(PDF) 40 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
ST72589BW 데이터시트(HTML) 40 Page - STMicroelectronics |
|
40 / 158 page ![]() ST72589BW, ST72389BW 40/158 MISCELLANEOUS REGISTERS (Cont’d) 6.3 Miscellaneous Registers Description MISCELLANEOUS REGISTER 1 (MISCR1) Read /Write Reset Value: 0000 0000 (00h) Bit 7:6 = IS11-IS10 EI1,3, 5 Sensitivity The selection issued from IS11,IS10 combination is applied to the following external interrupts: EI1 (port A3..0) EI3 (port B) and EI5 (port D). These 2 bits can be written only when the current interrupt software priority in the CC (Condition Code) register is set to level 3 (I1:0=11). Bit 5:4 = IS21-IS20 EI2,4 Sensitivity The selection issued from IS21,IS20 combination is applied to the following external interrupts: EI2 (port A7..4) and EI4 (port C). The functional description is equal to the IS1x one. Bit 3:2 = Reserved, always read as 0. Bit 1 = NMIS NMI Sensitivity This bit allows to toggle the NMI edge sensitivity. It can be set and cleared by software only when NMIE bit is cleared. 0: falling edge 1: rising edge Bit 0 = NMIE NMI Enable This bit allows to enable or disable the NMI capa- bility on the dedicated pin. It is set and cleared by software. 0: NMI disable 1: NMI enable MISCELLANEOUS REGISTER 2 (MISCR2) Read /Write Reset Value: 0000 0000 (00h) Bit 7 = Reserved. Bit 6:4 = MCO Main clock-out control BC1-BC0 Beep Control These 3 bits select the PC7 pin configuration. They are set and cleared by software. Note: the clock out and beep capabilities are not available in HALT modes. Bit 3:2 = Reserved, always read as 0. Bit 1 = SSM SS mode selection It is set and cleared by software. 0: Normal mode - SS uses information coming from the SS pin of the SPI. 1: I/O mode, the SPI uses the information stored into bit SSI. Bit 0 = SSI SS internal mode This bit replaces pin SS of the SPI when bit SSM is set to 1. (see SPI description). It is set and cleared by software. 70 IS11 IS10 IS21 IS20 0 0 NMIS NMIE ISx1 ISx0 External Interrupt Sensitivity 0 0 Falling edge and low level 0 1 Falling edge only 1 0 Rising edge only 1 1 Rising and falling edge 70 0 MCO BC1 BC0 0 0 SSM SSI MCO BC1 BC0 PC7 Configuration 0 0 0 Standard I/O 10 0 fOSC/2 Clock out X 0 1 ~2-KHz Output Beep signal w/ fOSC=16MHz ~50% duty cycle X 1 0 ~1-KHz X 1 1 ~500-Hz |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |