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ST72589BW 데이터시트(PDF) 42 Page - STMicroelectronics |
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ST72589BW 데이터시트(HTML) 42 Page - STMicroelectronics |
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42 / 158 page ![]() ST72589BW, ST72389BW 42/158 7 ON-CHIP PERIPHERALS 7.1 LCD DRIVER 7.1.1 Introduction The LCD driver controls up to 60 segments and 8 backplanes to drive up to 60x8 (480) or 60x4(240) LCD segments. Two programmable display modes (1/4 and 1/8 duty cycle) with 4 LCD drive frequencies can be selected by software. The parameters to display are stored in a 60-byte LCD dual port RAM. Four different main oscillator clocks can be select- ed as clock for the peripheral. – 8, 4, 2, 1 MHz fCPU software selectable. The peripheral can be switched off by software to reduce the power consumption while it is not used. Figure 25. LCD Frequency Generator Block Diagram 7.1.2 Voltage references The display voltage levels are supplied by an ex- ternal resistor chain as shown in Figure 26 This LCD driver needs 5 external voltage references through 5 pins (GLCD, 1/4VLCD, 1/2VLCD, 3/4VLCD, VLCD). The resistors used must have good tolerance matching within 1% to avoid DC voltage levels on the liquid crystal device. DC levels trigger elec- trode reactions in the liquid crystal cell, causing a rapid deterioration of the display quality. Note: To avoid damaging the device, VLCD supply voltages must always be supplied with more than VDD or they have to be left unconnected. Figure 26. LCD External Supply Network CLOCK DIVIDER fFR fLCDin ≈ 16KHz fCPU fLCD ≈ 0.5...2KHz DIV 8,16,24,32 DCS 0 CD1 CD0 LCDE 0 FS1 FS0 CR BACKPLANE MUX MAIN OSCILLATOR (SEG, COM) RLCD1 VLCD EXTERNAL VLCD 3/4VLCD 1/2VLCD 1/4VLCD GLCD RLCD2 RLCD3 RLCD4 CLCD1 CLCD2 CLCD3 |
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