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ST72611F1 데이터시트(PDF) 52 Page - STMicroelectronics |
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ST72611F1 데이터시트(HTML) 52 Page - STMicroelectronics |
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52 / 80 page ![]() ST7261 52/80 11.3 OPERATING CONDITIONS 11.3.1 General Operating Conditions Figure 30. fCPU Maximum Operating Frequency Versus VDD Supply Voltage 11.3.2 Operating Conditions with Low Voltage Detector (LVD) Subject to general operating conditions for VDD, fCPU, and TA. Refer to Figure 11 on page 14. Notes: 1. Not tested, guaranteed by design. 2. Not tested in production, guaranteed by characterization. 3. The VDD rise time rate condition is needed to insure a correct device power-on and LVD reset. Not tested in production. Symbol Parameter Conditions Min Typ Max Unit VDD Operating Supply Voltage fCPU = 8 MHz 45 5.5 V fCPU Operating frequency fOSC = 12MHz 8 MHz fOSC = 6MHz 4 TA Ambient temperature range 070 °C fCPU [MHz] SUPPLY VOLTAGE [V] 8 4 2 0 2.5 3.0 3.5 4 4.5 5 5.5 FUNCTIONALITY FUNCTIONALITY GUARANTEED IN THIS AREA NOT GUARANTEED IN THIS AREA (UNLESS OTHERWISE SPECIFIED IN THE TABLES OF PARAMETRIC DATA) Symbol Parameter Conditions Min Typ 1) Max Unit VIT+ Low Voltage Reset Threshold (VDD rising) VDD Max. Variation 50V/ms 3.6 3.8 3.95 V VIT- Low Voltage Reset Threshold (VDD falling) VDD Max. Variation 50V/ms 3.45 3.65 3.8 V Vhyst Hysteresis (VIT+ - VIT-) 120 2) 150 2) 180 2) mV VtPOR VDD rise time rate 3) 0.5 50 V/ms |
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