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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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AT80SND1C-ROTIL 데이터시트(PDF) 11 Page - ATMEL Corporation |
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AT80SND1C-ROTIL 데이터시트(HTML) 11 Page - ATMEL Corporation |
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11 / 210 page  11 AT8xC51SND1C 4109E–8051–06/03 Internal Pin Structure Table 15. Detailed Internal Pin Structure Notes: 1. For information on resistors value, input/output levels, and drive capability, refer to the Section “DC Characteristics”, page 181. 2. When the Two Wire controller is enabled, P1, P2, and P3 transistors are disabled allowing pseudo open-drain structure. 3. In Port 2, P 1 transistor is continuously driven when outputting a high level bit address (A15:8). Circuit (1) Type Pins Input TST Input/Output RST Input/Output P1(2) P2 (3) P3 P4 P53:0 Input/Output P0 MCMD MDAT ISP Output ALE SCLK DCLK DOUT DSEL MCLK Input/Output D+ D- VDD VSS P VDD Watchdog Output P3 VSS N P1 VDD VDD 2 osc Latch Output periods P2 VDD VSS N P VDD VSS N P VDD D+ D- |
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