STLC5464 datasheet(75/83 Pages) STMICROELECTRONICS

75 / 83 page

IX - EXTERNAL REGISTERS

These registers are located in shared memory. Initiate Block Address Register (IBAR) gives the Initiate

Block Address (IBA) in shared memory (see Register IBAR(34)H on Page 73).

‘Not used’ bits (Nu) are accessible by the microprocessor but the use of these bits by software is not

recommended.

IX.1 - Initialization Block in External Memory

Descriptor Address

Channel

Address

bit15

bit8

bit7

bit0

CH 0

IBA+00

Not used

TDA High

IBA+02

Transmit Descriptor Address (TDA Low)

IBA+04

Not used

RDA High

IBA+06

Receive Descriptor Address (RDA Low)

CH1

IBA+08

Not used

TDA High

IBA+10

Transmit Descriptor Address (TDA Low)

IBA+12

Not used

RDA High

IBA+14

Receive Descriptor Address (RDA Low)

CH 2

CH30

IBA+16

IBA+246

CH 31

IBA+248

Not used

TDA High

IBA+250

Transmit Descriptor Address (TDA Low)

IBA+252

Not used

RDA High

IBA+254

Receive Descriptor Address (RDA Low)

When Direct Memory Access Controller receives Start from one of 64 channels, it reads initialization block

immediately to know the first address of the first descriptor for this channel.

Bit 0 of Transmit Descriptor Address (TDA Low) and bit 0 of Receive Descriptor Address (RDA Low), are

at ZERO mandatory. This Least Significant Bit is not used by DMA Controller, The shared memory is

always a 16 bit memory for the DMA Controller.

N.B. If several descriptors are used to transmit one frame then before transmitting frame, DMA Controller

stores the address of the first Transmit Descriptor Address into this Initialization Block.

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