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M32C83T 데이터시트(PDF) 67 Page - Renesas Technology Corp

부품명 M32C83T
상세설명  16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  527 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C83T 데이터시트(HTML) 67 Page - Renesas Technology Corp

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Page 44
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RESET
VCC
0.2VCC or below
RESET
VCC
0V
0V
5V
5V
Recommended
Operation Voltage
The above applies to VCC = 5V
Supply a clock with 20 or more cycles to
the XIN pin
5. Reset
Hardware reset, software reset, and watchdog timer reset are available to reset the microcomputer.
5.1 Hardware Reset
5.1.1 Reset on a Stable Supply Voltage
The microcomputer resets pins, the CPU and SFR when the supply voltage meets the recommended
___________
performance conditions while an "L" signal is applied to the RESET pin (see Table 5.1). Apply an "H"
____________
signal to the RESET pin again after 20 or more clock cycles are input to the XIN pin while applying an "L"
____________
to the RESET pin. The CPU and SFR are reset and programs run from the address indicated by the reset
vector.
____________
The internal RAM is not reset. When the RESET pin becomes "L" while writing data to the internal RAM,
the internal RAM is in an indeterminate state.
5.1.2 Power-on Reset
The microcomputer resets pins, the CPU and SFR when the supply voltage applied to the VCC pin meets
___________
the recommended performance conditions while an "L" signal is applied to the RESET pin. (See Table
5.1.)
____________
The CPU and SFR are reset when the signal applied to the RESET pin changes low ("L") to high ("H")
after the main clock oscillation stabilizes and 20 or more clock cycles are applied to the XIN pin. Programs
run from the address indicated by the reset vector. The internal RAM is in a indeterminate state
Figure 5.1 shows a reset circuit. Figure 5.2 shows a reset sequence. Figure 5.3 shows CPU register condi-
____________
tions after reset. Table 5.1 lists pin states while the RESET pin is held "L". Refer to 4. SFR for SFR states
after reset.
Figure 5.1 Reset Circuit



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