R8C2K datasheet(284/471 Pages) RENESAS

284 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 267 of 450

REJ09B0406-0110

Figure 16.107 Registers TRDPOCR0 to TRDPOCR1 in PWM Mode

Figure 16.108 Registers TRD0 to TRD1 in PWM Mode

Timer RD PWM Mode Output Level Control Register i (i = 0 or 1)

Symbol

Address

After Reset

TRDPOCR0

TRDPOCR1

0145h

0155h

11111000b

Bit Symbol

Bit Name

Function

—

Nothing is assigned. If necessary, set to 0.

When read, the content is 1.

PWM mode output level control bit

0 : “L” active TRDIODi output level is

selected

1 : “H” active TRDIODi output level is

selected

POLC

PWM mode output level control bit

0 : “L” active TRDIOBi output level is

selected

1 : “H” active TRDIOBi output level is

selected

PWM mode output level control bit

0 : “L” active TRDIOCi output level is

selected

1 : “H” active TRDIOCi output level is

selected

POLB

b7 b6 b5 b4 b3 b2

—

(b7-b3)

b1 b0

POLD

Timer RD Counter i (i = 0 or 1)

(1)

Symbol

Address

After Reset

TRD0

TRD1

0147h-0146h

0157h-0156h

0000h

Setting Range

NOTE:

(b8)

(b15)

Access the TRDi register in 16-bit units. Do not access it in 8-bit units.

Function

Count a count source. Count operation is incremented.

When an overflow occurs, the OVF bit in the TRDSRi register is set to 1.

0000h to FFFFh

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